Internia

Hardware Engineer Interview Experiences

Apple

Hardware Engineer

San Francisco, CA

Winter 2026No Offer

Purdue University · Electrical Engineering

4th year · 3.3-3.6 GPA · 2 past internships

Hard Interview

TechnicalMultiple roundsSlow process

Six weeks of waiting and the rejection email said nothing useful. Phone screen with a team lead on circuit analysis and PCB layout. Technical round had Verilog questions plus a hardware debugging project discussion

Questions Asked

  1. 1.Whats the difference between UART, SPI and I2C communication protocols?
  2. 2.Explain what a watchdog timer does and why it's important in embedded systems

IBM

Hardware Engineer

Summer 2026Accepted

Rensselaer Polytechnic Institute · Electrical Engineering

2nd year · 3.7+ GPA · 0 past internships

VirtualConversationalResume Review

Single round, mostly behavioral questions, technical questions about experiences and skills listed on resume. Interviewed directly with team and hiring manager

Intel

Hardware Engineer

San Jose, CA

Winter 2026No Offer

Purdue University · Electrical Engineering

4th year · 3.3-3.6 GPA · 2 past internships

Hard Interview

TechnicalVirtual

Domain stuff matters more than coding here. Phone screen, then technical on semiconductor processes and VLSI design. Got a question about propagation delay and power tradeoffs I only partially answered. Coding at the end was easier

Questions Asked

  1. 1.What causes priority inversion and how do you solve it?
  2. 2.What is JTAG used for in hardware development?

Top Companies for Hardware Engineer

Related Roles